1. Field
Embodiments disclosed herein relate to a semiconductor device and a method of fabricating the same. More particularly, embodiments relate to a semiconductor device capable of suppressing short channel effect and a method of fabricating the same.
2. Description of the Related Art
A conventional transistor, e.g., a metal oxide semiconductor field effect transistor (MOSFET), may include a gate electrode formed on a semiconductor substrate and source/drain regions formed on the semiconductor substrate at both sides of the gate electrode. The source/drain regions may be doped with conductive impurities different from a conductive impurity of the semiconductor substrate, and may be used as source/drain electrodes of the transistor. A channel region may be defined under the gate electrode between the source and drain electrodes.
A plurality of the transistors, e.g., memory cell transistors and selection transistors, may be arranged to form a unit memory string in a memory device, e.g., a NAND flash memory device. For example, the memory cell transistors in a memory device may be programmed to store data, while a selection transistor may facilitate selection of memory cell transistors to be programmed. In order to prevent a memory cell in an unselected memory string from being unintentionally programmed, selection transistors of the unselected memory string may maintain an off-state during a program operation, so channel regions in the unselected memory string may be set in an electrically floating state, i.e., self-boosting. Since the unselected memory string is set in a floating state, even when an increased electric potential is applied to the word line, i.e., program voltage and a pass voltage, an unintentional program operation of the unselected memory cell may be prevented.
However, when an integration degree of the memory device is increased, a channel length of the selection transistor in the memory device may be reduced, thereby causing a short channel effect, e.g., one or more of punch-through and leakage current, in the selection transistor. Since short channel effects may deteriorate efficiency of the self-boosting, e.g., increased leakage current in selection transistors may erroneously register an “off-state” of the selection transistor as an “on-state,” program defects may be increased, e.g., erroneous memory cell programming, due to program disturbance.